Templated Vapor-Liquid-Solid Growth and Epitaxy of Compound Semiconductors
Olivia is a third-year graduate student in Materials Science advised by Jeramy Zimmerman. She received a B.S. in Engineering from Harvey Mudd College, where she focused on electronic materials and semiconductor device physics, as well as serving as president of the HMC chapter of Engineers for a Sustainable World. After graduating in 2017, she worked for Intel Corporation on 3DXPoint, a non-volatile memory technology
The need for more energy-efficient computing has caused growing interest in alternate computer architectures. Optical devices promise to replace traditional electrical interconnects and save energy and chip space. Neuromorphic devices would completely substitute artificial neural networks for the well-known von Neumann architecture that separates the central processing unit from memory, reducing energy use by several orders of magnitude. This project focuses on scalable processes for growing and processing materials relevant to these devices. Epitaxial growth of thin films is the most effective strategy for achieving high-quality materials in all of these applications. Templated vapor-liquid-solid growth is a cost-effective strategy for growing III-V semiconductors—the best candidates for optoelectronic devices integrated on Si due to their direct band gaps and high mobilities. Work to date has shown that this technique can be applied to epitaxial growth of InP on Si. While III-Vs are well-studied, the materials applicable to neuromorphic devices are still emerging. Rare-earth nickelates are a promising material system because most have a temperature-dependent transition between electrically insulating and conducting. Alloying can be used to tune the transition temperature so it can be easily achieved by applying pulses of electrical current. With all of these materials, their structural properties must be understood and controlled by carefully tuned growth conditions for optimal device performance, while keeping the growth processes compatible with standard integrated circuit fabrication procedures.